Intel's Hot Chips slate: 16 channels at 12800 MT/s, and UCIe in an entry-level laptop chip

Intel took three talks at Hot Chips 2026 in Palo Alto and used all of them on the same argument. The conference program lists "Intel Core Series 3, codename Wildcat Lake" in the CPU 1 session, "Diamond Rapids: Next Generation Intel Xeon CPU" in CPU 2, and "Crescent Island: GPU Designed for Agentic AI Inference" in the GPU session — all on Monday, August 24. Intel's newsroom post the same day tied them together.

Agentic AI is fundamentally changing how we design and deliver computing – from the transistor and package up through the full system architecture.

Pushkar Ranade, Intel CTO

That is the pitch. The numbers are more useful.

Diamond Rapids: the memory side is the story

Intel gives Diamond Rapids up to 256 cores with 1.28 GB of last-level cache, on the Intel 18A-P process, with Advanced Performance Extensions (APX) and an enhanced Advanced Matrix Extensions (AMX).

The interesting figures are not the core count. They are 16 memory channels at 12800 MT/s, and 128 lanes of PCIe Gen6 and CXL 3.0.

Sixteen channels at 12800 MT/s is a lot of feeding capacity per socket, and it is the specification that determines whether 256 cores are 256 useful cores or 256 cores waiting on DRAM. The 128 Gen6/CXL 3.0 lanes matter for the same reason one step out: CXL 3.0 is the memory-pooling generation, and a socket with that much coherent lane budget is designed on the assumption that some of its working set will live off-package.

Crescent Island: 480 GB on a 350 W air-cooled card

The inference GPU is where Intel has made the clearest positioning choice. Crescent Island is specified with 32 Xe cores and 256 XMX engines on an Xe3P base, up to 480 GB of LPDDR5X, in a 350-watt air-cooled PCIe card.

Read those three together and the design intent is unambiguous. LPDDR5X rather than HBM, and 480 GB of it, buys capacity instead of bandwidth. A 350 W air-cooled PCIe form factor buys deployability into racks that were not built for liquid.

That is a deliberate position at the opposite end of the market from the parts that need a cold plate and a rack redesign. Whether it is the right position depends on how much of real inference is capacity-bound rather than bandwidth-bound — but as a spec sheet, it is coherent, and it names its target.

Wildcat Lake puts UCIe in a consumer Intel chip

The smallest part carries the detail most likely to matter in three years.

Wildcat Lake, launching as Intel Core Series 3, is a 2 performance core plus 4 efficiency core design on Intel 18A, with LPDDR5X-7467 support, Xe3 graphics with XMX acceleration, an NPU rated at up to 17 TOPS for what Intel calls Hybrid AI, plus Wi-Fi 7 and Bluetooth 6.0.

It is also, per Intel, the first use of UCIe in an Intel consumer processor.

Intel has shipped chiplet-based client silicon before, using its own interconnects. Using UCIe — the industry-standard die-to-die interface — in an entry-level, price-sensitive part is a different signal. Standard interconnects earn their keep when you need to source or mix dies you did not design in-house, or when a part's economics do not justify a bespoke link. Intel's own framing is that the value-focused positioning is what made UCIe integration necessary.

Intel also names Foveros Direct 3D packaging and the 18A process family as the enabling technologies across the slate.

What is not in the announcement

No launch dates, no pricing, no benchmark figures, and no power numbers for Diamond Rapids or Wildcat Lake. Hot Chips is an architecture conference and Intel treated it as one — the newsroom post is a specification summary, not a product launch.

Two of the three parts also depend on the same bet: 18A and 18A-P have to deliver at volume. Diamond Rapids is 18A-P; Wildcat Lake is 18A. Intel's presentation slides go up on the Hot Chips site at the end of the year, along with the recorded talks, which is when the architecture claims become checkable in detail.

Primary sources: Intel Newsroom, "Intel Outlines Architectures for Agentic AI at Hot Chips 2026", Hot Chips 2026 conference program, read 2026-08-28.