Silicon and the machines that make it, measured on our own bench.
Ledger Donjon used photon-emission microscopy and a 980 nm laser to set two bits of the RP2350's DEBUGEN register, restore Secure debug, and read the Hacking Challenge secret from OTP.
AMD's EPYC 9006 "Venice" white paper claims 2.24x Nvidia Vera's SPECrate 2026 throughput and 1.2x its per-core performance. The endnotes describe the tested hardware, the compilers and even the rack figure differently from the headlines.
Raspberry Pi re-models chip carbon with Cornell and Columbia; LCA drops ~30%.
Intel published specs for Diamond Rapids, Crescent Island, and Wildcat Lake at Hot Chips 2026 — no dates, no prices, no benchmarks.
Socionext will build custom SoCs on Intel 18A-P, starting with a compute chiplet; no numbers or dates disclosed.
A $600 single-head jig provisions one CM5 at a time in about 1.5 minutes — and in secure-boot mode the OTP write cannot be undone.
Pixel 11's quantum-safe secure boot claim traces to ML-DSA in Android Verified Boot - with the parameter set and certification left unstated.
Anthropic confirms an in-house custom silicon effort for Claude, documented in its own hiring artifacts.
Kioxia/Sandisk gen-10 QLC: 332 layers, >37 Gb/mm², first 4.8 Gb/s QLC interface.
What the FCC's robot order actually says, what it doesn't, and why your robot vacuum is caught by a definition that never names it.
Raspberry Pi's 10-inch Touch Display 2: $80, 1200×1920 IPS, Raspberry Pi 5 and Compute Modules only.
AMD's 6th Gen EPYC "Venice" launches with "agent sandbox execution" as a headline workload.
